LISP Lore: A Guide to Programming the LISP Machine, 2nd by H. Bromley, Richard Lamson

Technique

By H. Bromley, Richard Lamson

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29. , “Susceptibility of commodity systems and software to memory soft errors,” IEEE Transactions on Computers, Vol. 53, No. 1557–1568, Dec. 2004. 30. Mohanty, S. , “Simultaneous Power Fluctuation and Average Power Minimization during Nano-CMOS Behavioral Synthesis”, in Proceedings of the 20th IEEE International Conference on VLSI Design (VLSID), pp. 577–582, 2007. 31. Mohanty, S. , “Steady and Transient State Analysis of Gate Leakage Current in Nanoscale CMOS Logic Gates”, in Proceedings of the 24th IEEE International Conference on Computer Design (ICCD), pp.

It significantly reduces the PGM method’s complexity, making it suitable for practical design-for-reliability applications. Proposed Defect Tolerance Technique In this chapter, we investigate defect tolerance based on adding redundancy at the transistor-level for electronic circuits. The work is focused on transistor stuck-open, stuck-short and bridges between gates of transistors. A transistor is considered defective if its expected behavior changes regardless of the type of defect causing it.

This will require a high level of reliability and safety involving innovative strategies, such as a nanorobot with self-destruction capability to ensure the safety of a patient in the event of a nanorobot failure. High-Availability Applications The applications under this category include time-shared systems, such as banking and reservation systems where providing the prompt services to the users is critical. In these applications while system-wide outages are unacceptable occasional loss of service to individual users are acceptable provided the service is restored quickly so that the downtime is minimized.

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